PCA9698
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NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 3 August 2010
29 of 48
NXP Semiconductors
PCA9698
40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
If AI = 0 or 1, the same register is read during the all sequence.
Fig 20. Read from output structure configuration, all bank control or mode selection registers
002aab949
S A6 A5 A4 A3 A2 A1 A0 0 A
slave address
R/W
START condition
command register
AI = 'don't care'
A
acknowledge
from slave
A
no acknowledge
from master
acknowledge
from slave
P
STOP
condition
SDA
X
01010 D1 D0
00 for output structure configuration register reading
01 for for all bank control register reading
10 for mode selection register reading
Sr
repeated START
condition
A6 A5 A4 A3 A2 A1 A0
slave address
1 A
R/W
acknowledge
from slave
data from register
DATA
last byte
At this moment master-transmitter
becomes master-receiver, and
slave-receiver becomes slave-transmitter.
Fig 21. SMBus Alert procedure
002aab950
A6 A5 A4 A3 A2 A1 A0 0
PCA9698 I2C-bus
slave address
R/W
A
no acknowledge
from master
P
STOP condition
S
0
1
0
SMBus Alert
response address
START condition
1 A
R/W
acknowledge from slave
that generated the alert
At this moment master-transmitter
becomes master-receiver and
slave receiver becomes slave-transmitter.
SMBALERT
SMBALERT signal is released
(assuming that only one device
generated the alert)
If more than 3 bytes are read, the slave device loops back to the first byte (manufacturer byte) and keeps sending data until the
master generates a ‘No Acknowledge’.
Fig 22. Device ID field reading
002aab951
A6 A5 A4 A3 A2 A1 A0
I2C-bus slave address
of the device to be identified
A
no acknowledge
from master
P
STOP condition
M
11
M
10
M9 M8 M7 M6 M5 M4
Sr
repeated START
condition
1 A
R/W
S
1
0
Device ID address
START condition
0 A
R/W
acknowledge from
one or several slaves
0 A
don't care
acknowledge from
slave to be identified
1
0
Device ID address
acknowledge from
slave to be identified
A M3 M2 M1 M0
acknowledge
from master
manufacturer name = 000000000000
P8 P7 P6 P5 A
acknowledge
from master
P4 P3 P2 P1 P0 R2 R1 R0
part identification = 000000000
revision = 000
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